[SeaBIOS] [PATCH] Updated version of OXPCIe serial port support
Stefan Reinauer
reinauer at google.com
Mon Feb 14 03:26:32 CET 2011
On Sat, Feb 12, 2011 at 2:30 PM, Kevin O'Connor <kevin at koconnor.net> wrote:
>> + while ((readb((void *)OXPCIE_COM1+SEROFF_LSR) & 0x60) != 0x60)
>
> I'm not sure how this will work. The bar is likely to be in high
> memory, yet this code can be run from 16bit mode.
>
> There is now pci_readl/pci_writel for trampolining into 32bit mode to
> read/write BARs. Would you want to trampoline to 32bit mode for a
> debug device though?
Ok, does it sound reasonable to add pci_readw and pci_readb for that, too?
Also, the functionality of those functions is somewhat pci unrelated,
it just happens to be useful for access to pci bars. I suggest
renaming them to pmode_readl or something like that in order to make
it easier to understand what the function really does. Sounds ok? Then
I would go ahead and implement it this way.
Stefan
--
Stefan Reinauer
Google Inc.
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