[SeaBIOS] [PATCH v2] Make pci memory window configurable.

[Isaku Yamahata]

On Wed, May 04, 2011 at 10:10:10AM +0200, Gerd Hoffmann wrote:
>> Looks like each bus uses 1meg alignment for all devices on that bus.
>
> That looks like a random pick to me.  Isaku?

I think so. At least chipset in qemu/qemu-kvm (PIIX4, q35)
doesn't have such restriction.

>  Looking at all devices  
> behind the bridge, then pick something where all bars fit in and are  
> properly aligned should work, right?

Yes, right.
You also want to take hot plug slots into range calculation.
hot plug slots needs some ranges for devices that will be 
inserted in future.
-- 
yamahata