coreboot-4.0-1929-g79cfe7e Tue Dec 27 19:15:48 CET 2011 starting... Found 1024MB of ram Loading image. Searching for fallback/coreboot_ram Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Stage: loading fallback/coreboot_ram @ 0x100000 (147456 bytes), entry @ 0x100000 Stage: done loading. Jumping to image. coreboot-4.0-1929-g79cfe7e Tue Dec 27 19:15:48 CET 2011 booting... clocks_per_usec: 1498 Enumerating buses... Show all devs...Before device enumeration. Root Device: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.1: enabled 1 PCI: 00:00.2: enabled 1 PCI: 00:00.3: enabled 1 PCI: 00:00.4: enabled 1 PCI: 00:00.7: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:0f.0: enabled 1 PCI: 00:0f.1: enabled 1 PCI: 00:10.0: enabled 1 PCI: 00:10.1: enabled 1 PCI: 00:10.2: enabled 1 PCI: 00:10.3: enabled 1 PCI: 00:10.4: enabled 1 PCI: 00:10.5: enabled 1 PCI: 00:11.0: enabled 1 PNP: 002e.0: enabled 1 PNP: 002e.1: enabled 1 PNP: 002e.2: enabled 0 PNP: 002e.3: enabled 1 PNP: 002e.4: enabled 1 PNP: 002e.5: enabled 0 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 1 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 1 PCI: 00:11.5: enabled 1 PCI: 00:12.0: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 Compare with tree... Root Device: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.1: enabled 1 PCI: 00:00.2: enabled 1 PCI: 00:00.3: enabled 1 PCI: 00:00.4: enabled 1 PCI: 00:00.7: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:0f.0: enabled 1 PCI: 00:0f.1: enabled 1 PCI: 00:10.0: enabled 1 PCI: 00:10.1: enabled 1 PCI: 00:10.2: enabled 1 PCI: 00:10.3: enabled 1 PCI: 00:10.4: enabled 1 PCI: 00:10.5: enabled 1 PCI: 00:11.0: enabled 1 PNP: 002e.0: enabled 1 PNP: 002e.1: enabled 1 PNP: 002e.2: enabled 0 PNP: 002e.3: enabled 1 PNP: 002e.4: enabled 1 PNP: 002e.5: enabled 0 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 1 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 1 PCI: 00:11.5: enabled 1 PCI: 00:12.0: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 scan_static_bus for Root Device In cn700 enable_dev for device PCI_DOMAIN: 0000. Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled In cn700 enable_dev for device APIC_CLUSTER: 0. APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 In cn700 enable_dev for device PCI: 00:00.0. PCI: 00:00.0 [1106/0314] ops PCI: 00:00.0 [1106/0314] enabled In cn700 enable_dev for device PCI: 00:00.1. PCI: 00:00.1 [1106/1314] enabled In cn700 enable_dev for device PCI: 00:00.2. PCI: 00:00.2 [1106/2314] enabled In cn700 enable_dev for device PCI: 00:00.3. PCI: 00:00.3 [1106/3208] ops PCI: 00:00.3 [1106/3208] enabled In cn700 enable_dev for device PCI: 00:00.4. PCI: 00:00.4 [1106/4314] enabled In cn700 enable_dev for device PCI: 00:00.7. PCI: 00:00.7 [1106/7314] enabled In cn700 enable_dev for device PCI: 00:01.0. PCI: 00:01.0 [1106/b198] bus ops PCI: 00:01.0 [1106/b198] enabled PCI: 00:0f.0 [1106/3149] ops PCI: 00:0f.0 [1106/3149] enabled PCI: 00:0f.1 [1106/0571] ops PCI: 00:0f.1 [1106/0571] enabled PCI: 00:10.0 [1106/3038] ops PCI: 00:10.0 [1106/3038] enabled PCI: 00:10.1 [1106/3038] ops PCI: 00:10.1 [1106/3038] enabled PCI: 00:10.2 [1106/3038] ops PCI: 00:10.2 [1106/3038] enabled PCI: 00:10.3 [1106/3038] ops PCI: 00:10.3 [1106/3038] enabled PCI: 00:10.4 [1106/3104] ops PCI: 00:10.4 [1106/3104] enabled PCI: 00:10.5 [1106/d104] enabled PCI: 00:11.0 [1106/3227] bus ops PCI: 00:11.0 [1106/3227] enabled PCI: 00:11.5 [1106/3059] enabled PCI: 00:12.0 [1106/3065] enabled do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [1106/3344] ops PCI: 01:00.0 [1106/3344] enabled PCI: pci_scan_bus returning with max=001 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:11.0 PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 disabled PNP: 002e.3 enabled PNP: 002e.4 enabled PNP: 002e.5 disabled PNP: 002e.6 disabled PNP: 002e.7 enabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a enabled scan_static_bus for PCI: 00:11.0 done PCI: pci_scan_bus returning with max=001 scan_static_bus for Root Device done done Setting up VGA for PCI: 01:00.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:11.0 read_resources bus 0 link: 0 PCI: 00:11.0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done APIC_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources APIC_CLUSTER: 0 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 PCI_DOMAIN: 0000 PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 400401 00 index 10000000 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40 040200 index 10000100 PCI: 00:00.0 PCI: 00:00.1 PCI: 00:00.2 PCI: 00:00.3 PCI: 00:00.4 PCI: 00:00.7 PCI: 00:01.0 child on link 0 PCI: 01:00.0 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff fl ags 1200 index 10 PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff fl ags 200 index 14 PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flag s 2200 index 30 PCI: 00:0f.0 PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:0f.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 inde x 20 PCI: 00:0f.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 ind ex 24 PCI: 00:0f.1 PCI: 00:0f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 inde x 20 PCI: 00:10.0 PCI: 00:10.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 inde x 20 PCI: 00:10.1 PCI: 00:10.1 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 inde x 20 PCI: 00:10.2 PCI: 00:10.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 inde x 20 PCI: 00:10.3 PCI: 00:10.3 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 inde x 20 PCI: 00:10.4 PCI: 00:10.4 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:10.5 PCI: 00:10.5 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10 PCI: 00:11.0 child on link 0 PNP: 002e.0 PCI: 00:11.0 resource base 500 size 80 align 0 gran 0 limit ffff flags f00001 00 index 88 PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0 limit ffff flags f000010 0 index 3 PCI: 00:11.0 resource base 400 size 10 align 0 gran 0 limit ffff flags f00001 00 index d0 PCI: 00:11.0 resource base fec00000 size 100 align 8 gran 8 limit ffffffff fl ags f0000200 index 44 PCI: 00:11.0 resource base ff000000 size 1000000 align 0 gran 0 limit fffffff f flags f0000200 index 4 PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c00001 00 index 1 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 ind ex 74 PNP: 002e.1 PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.2 PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.3 PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000800 ind ex 74 PNP: 002e.4 PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit 7ff flags c0000100 i ndex 62 PNP: 002e.4 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c000 0100 index 60 PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c000 0100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.6 PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.7 PNP: 002e.7 resource base 0 size 0 align 0 gran 0 limit 0 flags c0000100 ind ex 60 PNP: 002e.7 resource base 800 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62 PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags c0000100 i ndex 64 PNP: 002e.8 PNP: 002e.8 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60 PNP: 002e.8 resource base a size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.9 PNP: 002e.9 resource base 201 size 1 align 0 gran 0 limit ffffffff flags c00 00100 index 60 PNP: 002e.a PNP: 002e.a resource base 310 size 0 align 0 gran 0 limit 0 flags c0000100 i ndex 60 PNP: 002e.a resource base b size 0 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PCI: 00:11.5 PCI: 00:11.5 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 ind ex 10 PCI: 00:12.0 PCI: 00:12.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 ind ex 10 PCI: 00:12.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 14 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: f fff PCI: 00:0f.0 24 * [0x0 - 0xff] io PCI: 00:11.5 10 * [0x400 - 0x4ff] io PCI: 00:12.0 10 * [0x800 - 0x8ff] io PCI: 00:10.0 20 * [0xc00 - 0xc1f] io PCI: 00:10.1 20 * [0xc20 - 0xc3f] io PCI: 00:10.2 20 * [0xc40 - 0xc5f] io PCI: 00:10.3 20 * [0xc60 - 0xc7f] io PCI: 00:0f.0 20 * [0xc80 - 0xc8f] io PCI: 00:0f.1 20 * [0xc90 - 0xc9f] io PCI: 00:0f.0 10 * [0xca0 - 0xca7] io PCI: 00:0f.0 18 * [0xca8 - 0xcaf] io PCI: 00:0f.0 14 * [0xcb0 - 0xcb3] io PCI: 00:0f.0 1c * [0xcb4 - 0xcb7] io PCI_DOMAIN: 0000 compute_resources_io: base: cb8 size: cb8 align: 8 gran: 0 limi t: ffff done PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:10.4 10 * [0x0 - 0xff] mem PCI: 00:10.5 10 * [0x100 - 0x1ff] mem PCI: 00:12.0 14 * [0x200 - 0x2ff] mem PCI_DOMAIN: 0000 compute_resources_mem: base: 300 size: 300 align: 8 gran: 0 lim it: ffffffff done avoid_fixed_resources: PCI_DOMAIN: 0000 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI_DOMAIN: 0000 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:00.1 constrain_resources: PCI: 00:00.2 constrain_resources: PCI: 00:00.3 constrain_resources: PCI: 00:00.4 constrain_resources: PCI: 00:00.7 constrain_resources: PCI: 00:01.0 constrain_resources: PCI: 01:00.0 constrain_resources: PCI: 00:0f.0 constrain_resources: PCI: 00:0f.1 constrain_resources: PCI: 00:10.0 constrain_resources: PCI: 00:10.1 constrain_resources: PCI: 00:10.2 constrain_resources: PCI: 00:10.3 constrain_resources: PCI: 00:10.4 constrain_resources: PCI: 00:10.5 constrain_resources: PCI: 00:11.0 constrain_resources: PNP: 002e.0 constrain_resources: PNP: 002e.1 constrain_resources: PNP: 002e.3 constrain_resources: PNP: 002e.4 constrain_resources: PNP: 002e.7 skipping PNP: 002e.7@60 fixed resource, size=0! constrain_resources: PNP: 002e.a skipping PNP: 002e.a@60 fixed resource, size=0! skipping PNP: 002e.a@70 fixed resource, size=0! constrain_resources: PCI: 00:11.5 constrain_resources: PCI: 00:12.0 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001000 lim->limit 0000ffff avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit febfffff Setting resources... PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:cb8 align:8 gran:0 limit: ffff Assigned: PCI: 00:0f.0 24 * [0x1000 - 0x10ff] io Assigned: PCI: 00:11.5 10 * [0x1400 - 0x14ff] io Assigned: PCI: 00:12.0 10 * [0x1800 - 0x18ff] io Assigned: PCI: 00:10.0 20 * [0x1c00 - 0x1c1f] io Assigned: PCI: 00:10.1 20 * [0x1c20 - 0x1c3f] io Assigned: PCI: 00:10.2 20 * [0x1c40 - 0x1c5f] io Assigned: PCI: 00:10.3 20 * [0x1c60 - 0x1c7f] io Assigned: PCI: 00:0f.0 20 * [0x1c80 - 0x1c8f] io Assigned: PCI: 00:0f.1 20 * [0x1c90 - 0x1c9f] io Assigned: PCI: 00:0f.0 10 * [0x1ca0 - 0x1ca7] io Assigned: PCI: 00:0f.0 18 * [0x1ca8 - 0x1caf] io Assigned: PCI: 00:0f.0 14 * [0x1cb0 - 0x1cb3] io Assigned: PCI: 00:0f.0 1c * [0x1cb4 - 0x1cb7] io PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1cb8 size: cb8 align: 8 gran: 0 done PCI_DOMAIN: 0000 allocate_resources_mem: base:febffd00 size:300 align:8 gran:0 l imit:febfffff Assigned: PCI: 00:10.4 10 * [0xfebffd00 - 0xfebffdff] mem Assigned: PCI: 00:10.5 10 * [0xfebffe00 - 0xfebffeff] mem Assigned: PCI: 00:12.0 14 * [0xfebfff00 - 0xfebfffff] mem PCI_DOMAIN: 0000 allocate_resources_mem: next_base: fec00000 size: 300 align: 8 gran: 0 done Root Device assign_resources, bus 0 link: 0 Entering cn700 pci_domain_set_resources. tomk is 0x100000 tom: 40000000, high_tables_base: 3dff0000, high_tables_size: 10000 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:0f.0 10 <- [0x0000001ca0 - 0x0000001ca7] size 0x00000008 gran 0x03 io PCI: 00:0f.0 14 <- [0x0000001cb0 - 0x0000001cb3] size 0x00000004 gran 0x02 io PCI: 00:0f.0 18 <- [0x0000001ca8 - 0x0000001caf] size 0x00000008 gran 0x03 io PCI: 00:0f.0 1c <- [0x0000001cb4 - 0x0000001cb7] size 0x00000004 gran 0x02 io PCI: 00:0f.0 20 <- [0x0000001c80 - 0x0000001c8f] size 0x00000010 gran 0x04 io PCI: 00:0f.0 24 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 00:0f.1 20 <- [0x0000001c90 - 0x0000001c9f] size 0x00000010 gran 0x04 io PCI: 00:10.0 20 <- [0x0000001c00 - 0x0000001c1f] size 0x00000020 gran 0x05 io PCI: 00:10.1 20 <- [0x0000001c20 - 0x0000001c3f] size 0x00000020 gran 0x05 io PCI: 00:10.2 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io PCI: 00:10.3 20 <- [0x0000001c60 - 0x0000001c7f] size 0x00000020 gran 0x05 io PCI: 00:10.4 10 <- [0x00febffd00 - 0x00febffdff] size 0x00000100 gran 0x08 mem PCI: 00:10.5 10 <- [0x00febffe00 - 0x00febffeff] size 0x00000100 gran 0x08 mem PCI: 00:11.0 assign_resources, bus 0 link: 0 PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 002e.3 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io PNP: 002e.3 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq PNP: 002e.3 74 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 drq PNP: 002e.4 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io PNP: 002e.4 62 <- [0x0000000000 - 0x0000000007] size 0x00000008 gran 0x03 io PNP: 002e.4 70 <- [0x0000000009 - 0x0000000009] size 0x00000001 gran 0x00 irq PNP: 002e.7 60 <- [0x0000000000 - 0xffffffffffffffff] size 0x00000000 gran 0x00 io PNP: 002e.7 62 <- [0x0000000800 - 0x0000000807] size 0x00000008 gran 0x03 io PNP: 002e.7 64 <- [0x0000000000 - 0x0000000007] size 0x00000008 gran 0x03 io PNP: 002e.a 60 <- [0x0000000310 - 0x000000030f] size 0x00000000 gran 0x00 io PNP: 002e.a 70 <- [0x000000000b - 0x000000000a] size 0x00000000 gran 0x00 irq PCI: 00:11.0 assign_resources, bus 0 link: 0 PCI: 00:11.5 10 <- [0x0000001400 - 0x00000014ff] size 0x00000100 gran 0x08 io PCI: 00:12.0 10 <- [0x0000001800 - 0x00000018ff] size 0x00000100 gran 0x08 io PCI: 00:12.0 14 <- [0x00febfff00 - 0x00febfffff] size 0x00000100 gran 0x08 mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 PCI_DOMAIN: 0000 PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0 PCI_DOMAIN: 0000 resource base 1000 size cb8 align 8 gran 0 limit ffff flags 4 0040100 index 10000000 PCI_DOMAIN: 0000 resource base febffd00 size 300 align 8 gran 0 limit febfffff flags 40040200 index 10000100 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004 200 index a PCI_DOMAIN: 0000 resource base c0000 size 3df40000 align 0 gran 0 limit 0 flag s e0004200 index b PCI: 00:00.0 PCI: 00:00.1 PCI: 00:00.2 PCI: 00:00.3 PCI: 00:00.4 PCI: 00:00.7 PCI: 00:01.0 child on link 0 PCI: 01:00.0 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff fl ags 1200 index 10 PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff fl ags 200 index 14 PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flag s 2200 index 30 PCI: 00:0f.0 PCI: 00:0f.0 resource base 1ca0 size 8 align 3 gran 3 limit ffff flags 600001 00 index 10 PCI: 00:0f.0 resource base 1cb0 size 4 align 2 gran 2 limit ffff flags 600001 00 index 14 PCI: 00:0f.0 resource base 1ca8 size 8 align 3 gran 3 limit ffff flags 600001 00 index 18 PCI: 00:0f.0 resource base 1cb4 size 4 align 2 gran 2 limit ffff flags 600001 00 index 1c PCI: 00:0f.0 resource base 1c80 size 10 align 4 gran 4 limit ffff flags 60000 100 index 20 PCI: 00:0f.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 6000 0100 index 24 PCI: 00:0f.1 PCI: 00:0f.1 resource base 1c90 size 10 align 4 gran 4 limit ffff flags 60000 100 index 20 PCI: 00:10.0 PCI: 00:10.0 resource base 1c00 size 20 align 5 gran 5 limit ffff flags 60000 100 index 20 PCI: 00:10.1 PCI: 00:10.1 resource base 1c20 size 20 align 5 gran 5 limit ffff flags 60000 100 index 20 PCI: 00:10.2 PCI: 00:10.2 resource base 1c40 size 20 align 5 gran 5 limit ffff flags 60000 100 index 20 PCI: 00:10.3 PCI: 00:10.3 resource base 1c60 size 20 align 5 gran 5 limit ffff flags 60000 100 index 20 PCI: 00:10.4 PCI: 00:10.4 resource base febffd00 size 100 align 8 gran 8 limit febfffff fl ags 60000200 index 10 PCI: 00:10.5 PCI: 00:10.5 resource base febffe00 size 100 align 8 gran 8 limit febfffff fl ags 60000200 index 10 PCI: 00:11.0 child on link 0 PNP: 002e.0 PCI: 00:11.0 resource base 500 size 80 align 0 gran 0 limit ffff flags f00001 00 index 88 PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0 limit ffff flags f000010 0 index 3 PCI: 00:11.0 resource base 400 size 10 align 0 gran 0 limit ffff flags f00001 00 index d0 PCI: 00:11.0 resource base fec00000 size 100 align 8 gran 8 limit ffffffff fl ags f0000200 index 44 PCI: 00:11.0 resource base ff000000 size 1000000 align 0 gran 0 limit fffffff f flags f0000200 index 4 PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c00001 00 index 1 PNP: 002e.0 PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 ind ex 74 PNP: 002e.1 PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 002e.2 PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.3 PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000800 ind ex 74 PNP: 002e.4 PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit 7ff flags e0000100 i ndex 62 PNP: 002e.4 resource base 9 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 002e.5 PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c000 0100 index 60 PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c000 0100 index 62 PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.6 PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.7 PNP: 002e.7 resource base 0 size 0 align 0 gran 0 limit 0 flags e0000100 ind ex 60 PNP: 002e.7 resource base 800 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62 PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags e0000100 i ndex 64 PNP: 002e.8 PNP: 002e.8 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60 PNP: 002e.8 resource base a size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 002e.9 PNP: 002e.9 resource base 201 size 1 align 0 gran 0 limit ffffffff flags c00 00100 index 60 PNP: 002e.a PNP: 002e.a resource base 310 size 0 align 0 gran 0 limit 0 flags e0000100 i ndex 60 PNP: 002e.a resource base b size 0 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PCI: 00:11.5 PCI: 00:11.5 resource base 1400 size 100 align 8 gran 8 limit ffff flags 6000 0100 index 10 PCI: 00:12.0 PCI: 00:12.0 resource base 1800 size 100 align 8 gran 8 limit ffff flags 6000 0100 index 10 PCI: 00:12.0 resource base febfff00 size 100 align 8 gran 8 limit febfffff fl ags 60000200 index 14 APIC_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 06 PCI: 00:00.1 subsystem <- 1019/aa51 PCI: 00:00.1 cmd <- 06 PCI: 00:00.2 subsystem <- 1019/aa51 PCI: 00:00.2 cmd <- 06 PCI: 00:00.4 subsystem <- 1019/aa51 PCI: 00:00.4 cmd <- 06 PCI: 00:00.7 subsystem <- 1019/aa51 PCI: 00:00.7 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 000b PCI: 00:01.0 cmd <- 07 PCI: 00:0f.0 cmd <- 01 PCI: 00:0f.1 cmd <- 81 PCI: 00:10.0 cmd <- 01 PCI: 00:10.1 cmd <- 01 PCI: 00:10.2 cmd <- 01 PCI: 00:10.3 cmd <- 01 PCI: 00:10.4 cmd <- 02 PCI: 00:10.5 subsystem <- 1019/aa51 PCI: 00:10.5 cmd <- 02 PCI: 00:11.0 cmd <- 07 PCI: 00:11.5 subsystem <- 1019/aa51 PCI: 00:11.5 cmd <- 01 PCI: 00:12.0 subsystem <- 1019/aa51 PCI: 00:12.0 cmd <- 83 PCI: 01:00.0 cmd <- 03 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init start_eip=0x00005000, offset=0x00100000, code_size=0x0000005b Initializing CPU #0 CPU: vendor Centaur device 6a9 CPU: family 06, model 0a, stepping 09 Detected VIA Model A C7-D Enabling improved C7 clock and voltage. Voltage: 1084mV (min 1084mV; max 1084mV) CPU multiplier: 15x (min 15x; max 15x) msr.lo = f000f18 new msr.lo = f18 Current voltage: 1084mV Current CPU multiplier: 15x Enabling cache Setting fixed MTRRs(0-88) Type: UC Setting fixed MTRRs(0-16) Type: WB Setting fixed MTRRs(24-88) Type: WB DONE fixed MTRRs call enable_fixed_mtrr() Setting variable MTRR 0, base: 0MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xf Setting variable MTRR 1, base: 512MB, range: 256MB, type WB ADDRESS_MASK_HIGH=0xf Setting variable MTRR 2, base: 768MB, range: 128MB, type WB ADDRESS_MASK_HIGH=0xf Setting variable MTRR 3, base: 896MB, range: 64MB, type WB ADDRESS_MASK_HIGH=0xf Setting variable MTRR 4, base: 960MB, range: 32MB, type WB ADDRESS_MASK_HIGH=0xf Zero-sized MTRR range @0KB DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local apic... apic_id: 0x00 done. CPU #0 initialized All AP CPUs stopped PCI: 00:00.0 init Enabling AGP. PCI: 00:00.1 init Searching for pci1106,1314.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,1314.rom'. PCI: 00:00.2 init Searching for pci1106,2314.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,2314.rom'. PCI: 00:00.3 init PCI: 00:00.4 init Searching for pci1106,4314.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,4314.rom'. PCI: 00:00.7 init Searching for pci1106,7314.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,7314.rom'. PCI: 00:01.0 init Setting up AGP bridge device PCI: 00:0f.0 init Configuring VIA SATA controller PCI: 00:0f.1 init Primary IDE interface enabled Secondary IDE interface enabled Enables in reg 0x40 read back as 0x4b Enables in reg 0x42 read back as 0x9 PCI: 00:10.0 init PCI: 00:10.1 init PCI: 00:10.2 init PCI: 00:10.3 init PCI: 00:10.4 init PCI: 00:10.5 init Searching for pci1106,d104.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,d104.rom'. PCI: 00:11.0 init Entering vt8237r_init. RTC Init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 IOAPIC: 23 interrupts IOAPIC: Enabling interrupts on FSB IOAPIC: reg 0x00000000 value 0x00000000 0x00000700 IOAPIC: reg 0x00000001 value 0x00000000 0x00010000 IOAPIC: reg 0x00000002 value 0x00000000 0x00010000 IOAPIC: reg 0x00000003 value 0x00000000 0x00010000 IOAPIC: reg 0x00000004 value 0x00000000 0x00010000 IOAPIC: reg 0x00000005 value 0x00000000 0x00010000 IOAPIC: reg 0x00000006 value 0x00000000 0x00010000 IOAPIC: reg 0x00000007 value 0x00000000 0x00010000 IOAPIC: reg 0x00000008 value 0x00000000 0x00010000 IOAPIC: reg 0x00000009 value 0x00000000 0x00010000 IOAPIC: reg 0x0000000a value 0x00000000 0x00010000 IOAPIC: reg 0x0000000b value 0x00000000 0x00010000 IOAPIC: reg 0x0000000c value 0x00000000 0x00010000 IOAPIC: reg 0x0000000d value 0x00000000 0x00010000 IOAPIC: reg 0x0000000e value 0x00000000 0x00010000 IOAPIC: reg 0x0000000f value 0x00000000 0x00010000 IOAPIC: reg 0x00000010 value 0x00000000 0x00010000 IOAPIC: reg 0x00000011 value 0x00000000 0x00010000 IOAPIC: reg 0x00000012 value 0x00000000 0x00010000 IOAPIC: reg 0x00000013 value 0x00000000 0x00010000 IOAPIC: reg 0x00000014 value 0x00000000 0x00010000 IOAPIC: reg 0x00000015 value 0x00000000 0x00010000 IOAPIC: reg 0x00000016 value 0x00000000 0x00010000 Keyboard init... No PS/2 keyboard detected. Leaving vt8237r_init. And taking a dump: 00: 06 11 27 32 87 00 10 02 00 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 44 7f f8 0b 00 00 10 00 8c 20 00 00 44 00 00 08 50: 80 1d 09 00 00 00 00 00 43 80 00 0b 00 00 00 00 60: 00 00 00 00 00 00 00 04 00 00 00 00 80 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 20 00 00 00 80: 20 84 49 00 b2 30 00 00 01 05 00 00 00 18 00 00 90: 00 f7 de 88 a0 cc 00 00 00 87 1a 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 04 01 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 04 09 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 0b 00 00 00 00 00 00 00 00 00 PCI: 00:11.5 init Searching for pci1106,3059.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,3059.rom'. PCI: 00:12.0 init Searching for pci1106,3065.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,3065.rom'. PCI: 01:00.0 init Initializing VGA... Searching for pci1106,3344.rom Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Check config Check Could not find file 'pci1106,3344.rom'. PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.3 init PNP: 002e.4 init FAN_CTL: reg = 0x02a9, read value = 0x50 FAN_CTL: reg = 0x02a9, writing value = 0xd7 PNP: 002e.7 init PNP: 002e.a init Devices initialized Show all devs...After init. Root Device: enabled 1 PCI_DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:00.1: enabled 1 PCI: 00:00.2: enabled 1 PCI: 00:00.3: enabled 1 PCI: 00:00.4: enabled 1 PCI: 00:00.7: enabled 1 PCI: 00:01.0: enabled 1 PCI: 00:0f.0: enabled 1 PCI: 00:0f.1: enabled 1 PCI: 00:10.0: enabled 1 PCI: 00:10.1: enabled 1 PCI: 00:10.2: enabled 1 PCI: 00:10.3: enabled 1 PCI: 00:10.4: enabled 1 PCI: 00:10.5: enabled 1 PCI: 00:11.0: enabled 1 PNP: 002e.0: enabled 1 PNP: 002e.1: enabled 1 PNP: 002e.2: enabled 0 PNP: 002e.3: enabled 1 PNP: 002e.4: enabled 1 PNP: 002e.5: enabled 0 PNP: 002e.6: enabled 0 PNP: 002e.7: enabled 1 PNP: 002e.8: enabled 0 PNP: 002e.9: enabled 0 PNP: 002e.a: enabled 1 PCI: 00:11.5: enabled 1 PCI: 00:12.0: enabled 1 APIC_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 PCI: 01:00.0: enabled 1 Initializing CBMEM area to 0x3dff0000 (65536 bytes) Adding CBMEM entry as no. 1 Moving GDT to 3dff0200...ok High Tables Base is 3dff0000. Copying Interrupt Routing Table to 0x000f0000... done. Adding CBMEM entry as no. 2 Copying Interrupt Routing Table to 0x3dff0400... done. PIRQ table: 192 bytes. Wrote the mp table end at: 000f0410 - 000f0578 Adding CBMEM entry as no. 3 Wrote the mp table end at: 3dff1410 - 3dff1578 MP table: 376 bytes. Adding CBMEM entry as no. 4 smbios_write_tables: 3dff2400 Root Device (VIA pc2500e Mainboard) PCI_DOMAIN: 0000 (VIA CN700 Northbridge) PCI: 00:00.0 (VIA CN700 Northbridge) PCI: 00:00.1 (VIA CN700 Northbridge) PCI: 00:00.2 (VIA CN700 Northbridge) PCI: 00:00.3 (VIA CN700 Northbridge) PCI: 00:00.4 (VIA CN700 Northbridge) PCI: 00:00.7 (VIA CN700 Northbridge) PCI: 00:01.0 (VIA CN700 Northbridge) PCI: 00:0f.0 (VIA VT8237R Southbridge) PCI: 00:0f.1 (VIA VT8237R Southbridge) PCI: 00:10.0 (VIA VT8237R Southbridge) PCI: 00:10.1 (VIA VT8237R Southbridge) PCI: 00:10.2 (VIA VT8237R Southbridge) PCI: 00:10.3 (VIA VT8237R Southbridge) PCI: 00:10.4 (VIA VT8237R Southbridge) PCI: 00:10.5 (VIA VT8237R Southbridge) PCI: 00:11.0 (VIA VT8237R Southbridge) PNP: 002e.0 (ITE IT8716F Super I/O) PNP: 002e.1 (ITE IT8716F Super I/O) PNP: 002e.2 (ITE IT8716F Super I/O) PNP: 002e.3 (ITE IT8716F Super I/O) PNP: 002e.4 (ITE IT8716F Super I/O) PNP: 002e.5 (ITE IT8716F Super I/O) PNP: 002e.6 (ITE IT8716F Super I/O) PNP: 002e.7 (ITE IT8716F Super I/O) PNP: 002e.8 (ITE IT8716F Super I/O) PNP: 002e.9 (ITE IT8716F Super I/O) PNP: 002e.a (ITE IT8716F Super I/O) PCI: 00:11.5 (VIA VT8237R Southbridge) PCI: 00:12.0 (VIA VT8237R Southbridge) APIC_CLUSTER: 0 (VIA CN700 Northbridge) APIC: 00 () PCI: 01:00.0 () SMBIOS tables: 284 bytes. Adding CBMEM entry as no. 5 Writing high table forward entry at 0x00000500 Wrote coreboot table at: 00000500 - 00000518 checksum 95df New low_table_end: 0x00000518 Now going to write high coreboot table at 0x3dff2c00 rom_table_end = 0x3dff2c00 Adjust low_table_end from 0x00000518 to 0x00001000 Adjust rom_table_end from 0x3dff2c00 to 0x3e000000 Adding high table area coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-000000003dfeffff: RAM 3. 000000003dff0000-000000003dffffff: CONFIGURATION TABLES 4. 00000000fec00000-00000000fec000ff: RESERVED 5. 00000000ff000000-00000000ffffffff: RESERVED Wrote coreboot table at: 3dff2c00 - 3dff2dcc checksum 2fdb coreboot table: 460 bytes. Multiboot Information structure has been written. 0. FREE SPACE 3dff4c00 0000b400 1. GDT 3dff0200 00000200 2. IRQ TABLE 3dff0400 00001000 3. SMP TABLE 3dff1400 00001000 4. SMBIOS 3dff2400 00000800 5. COREBOOT 3dff2c00 00002000 Searching for fallback/payload Check cmos_layout.bin Check fallback/romstage Check fallback/coreboot_ram Check fallback/payload Got a payload Loading segment from rom address 0xfff8cf38 data (compression=1) New segment dstaddr 0xe6b54 memsize 0x194ac srcaddr 0xfff8cf70 filesize 0xc8b6 (cleaned up) New segment addr 0xe6b54 size 0x194ac offset 0xfff8cf70 filesize 0xc8b6 Loading segment from rom address 0xfff8cf54 Entry Point 0x00000000 Loading Segment: addr: 0x00000000000e6b54 memsz: 0x00000000000194ac filesz: 0x00 0000000000c8b6 lb: [0x0000000000100000, 0x0000000000124000) Post relocation: addr: 0x00000000000e6b54 memsz: 0x00000000000194ac filesz: 0x00 0000000000c8b6 using LZMA [ 0x000e6b54, 00100000, 0x00100000) <- fff8cf70 dest 000e6b54, end 00100000, bouncebuffer 3dfa8000 Loaded segments Jumping to boot code at fc8e4 entry = 0x000fc8e4 lb_start = 0x00100000 lb_size = 0x00024000 adjust = 0x3decc000 buffer = 0x3dfa8000 elf_boot_notes = 0x00113170 adjusted_boot_notes = 0x3dfdf170 Start bios (version 1.6.3-20111227_191638-debian) Found mainboard VIA pc2500e Found CBFS header at 0xfffffc10 Ram Size=0x3dff0000 (0x0000000000000000 high) Relocating init from 0x000e7340 to 0x3dfd5190 (size 44356) CPU Mhz=1498 Found 19 PCI devices (max PCI bus is 01) Found 1 cpu(s) max supported 1 cpu(s) Copying PIR from 0x3dff0400 to 0x000fdaa0 Copying MPTABLE from 0x3dff1400/3dff1410 to 0x000fd920 Copying SMBIOS entry point from 0x3dff2400 to 0x000fd900 Scan for VGA option rom Warning: VGA memory size and speed is hardcoded EHCI init on dev 00:10.4 (regs=0xfebffd10) Found 1 lpt ports Found 1 serial ports ATA controller 1 at 1ca0/1cb0/0 (irq 0 dev 78) ATA controller 2 at 1ca8/1cb4/0 (irq 0 dev 78) ATA controller 3 at 1f0/3f4/0 (irq 14 dev 79) ATA controller 4 at 170/374/0 (irq 15 dev 79) UHCI init on dev 00:10.0 (io=1c00) UHCI init on dev 00:10.1 (io=1c20) UHCI init on dev 00:10.2 (io=1c40) UHCI init on dev 00:10.3 (io=1c60) ata2-0: TOSHIBA MK4025GAS ATA-6 Hard-Disk (38154 MiBytes) Searching bootorder for: /pci@i0cf8/*@f,1/drive@2/disk@0 Got ps2 nak (status=d1) ebda moved from 9fc00 to 9f800 USB keyboard initialized All threads complete. Scan for option roms Press F12 for boot menu. Select boot device: 1. ata2-0: TOSHIBA MK4025GAS ATA-6 Hard-Disk (38154 MiBytes) drive 0x000fd890: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=78140160 Returned 53248 bytes of ZoneHigh e820 map has 7 items: 0: 0000000000000000 - 000000000009f800 = 1 RAM 1: 000000000009f800 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 000000003dfed000 = 1 RAM 4: 000000003dfed000 - 000000003e000000 = 2 RESERVED 5: 00000000fec00000 - 00000000fec00100 = 2 RESERVED 6: 00000000ff000000 - 0000000100000000 = 2 RESERVED coreboot-4.0-1929-g79cfe7e Tue Dec 27 19:15:48 CET 2011 starting... Found 1024MB of ram Loading image. Searching for fallback/coreboot_ram