<div dir="ltr">Hi Anthony,<div><br></div><div style>In order to build a working SeaBIOS for the Pixel, you should use our ChromeOS tree because unfortunately we have not been able to upstream all the patches we carry around yet.</div>
<div><br></div><div>$ git clone <a href="https://gerrit.chromium.org/gerrit/p/chromiumos/third_party/seabios.git">https://gerrit.chromium.org/gerrit/p/chromiumos/third_party/seabios.git</a><br></div><div style>$ cd seabios</div>
<div style>$ git checkout origin/chromeos-2012.05.12</div><div style><br></div><div style>Build it with:</div><div style>$ cp default.config .config<br></div><div style>$ make</div><div style><br></div><div style>Then create a CBFS</div>
<div style><br></div><div style># get the PCI option rom</div><div style>$ wget <a href="http://www.coreboot.org/~stepan/pci8086,0166.rom">http://www.coreboot.org/~stepan/pci8086,0166.rom</a></div><div style># Create a dummy bootblock to make cbfstool happy<br>
</div><div style>$ dd if=/dev/zero of=bootblock count=1 bs=64</div><div style># Create empty CBFS<br></div><div style>$ cbfstool seabios.cbfs create -s $(( 2*1024*1024 )) -B bootblock -m x86<br></div><div style># Add SeaBIOS binary to CBFS<br>
</div><div style>$ cbfstool seabios.cbfs add-payload -f out/bios.bin.elf -n payload -c lzma<br></div><div style># Add VGA option rom to CBFS<br></div><div style><div>$ cbfstool seabios.cbfs add -f pci8086,0166.rom -n pci8086,0166.rom -t optionrom</div>
</div><div style># Add additional configuration<br></div><div style>$ cbfstool seabios.cbfs add -f bootorder -n bootorder -t raw<br></div><div style>$ cbfstool seabios.cbfs add -f boot-menu-wait -n boot-menu-wait -t raw<br>
</div><div style><div># Print CBFS inventory</div><div>$ cbfstool seabios.cbfs print</div><div><div># Fix up CBFS to live at 0xffc00000. The last four bytes of a CBFS</div><div># image are a pointer to the CBFS master header. Per default a CBFS</div>
<div># lives at 4G - rom size, and the CBFS master header ends up at</div><div># 0xffffffa0. However our CBFS lives at 4G-4M and is 2M in size, so</div><div># the CBFS master header is at 0xffdfffa0 instead. The two lines</div>
<div># below correct the according byte in that pointer to make all CBFS</div><div># parsing code happy. In the long run we should fix cbfstool and</div><div># remove this workaround.</div></div><div>/bin/echo -ne \\0737 | dd of=seabios.cbfs seek=$(( (2*1024*1024) - 2 )) bs=1 conv=notrunc<br>
</div><div><br></div><div style>That's it. :-)</div><div style><br></div><div style>I also uploaded an image with your change to</div><div style><br></div><div style><a href="http://www.coreboot.org/~stepan/seabios.cbfs.bz2">http://www.coreboot.org/~stepan/seabios.cbfs.bz2</a></div>
</div><div style><br></div><div style><br></div><div style>Flash it on the ChromeBook with:</div><div style><br></div><div style># cd /tmp</div><div style># flashrom -r image.rom</div><div style># dd if=seabios.cbfs of=image.rom seek=2 bs=2M conv=notrunc</div>
<div style># flashrom -w image.rom -i RW_LEGACY</div><div style><br></div><div style>On Thu, Apr 25, 2013 at 9:15 AM, ron minnich <span dir="ltr"><<a href="mailto:rminnich@gmail.com" target="_blank">rminnich@gmail.com</a>></span> wrote:<br>
</div><div class="gmail_extra"><div class="gmail_quote"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">stefan, how do we fix this?<br>
<br>
On Wed, Apr 24, 2013 at 6:36 PM, Anthony Liguori <<a href="mailto:aliguori@us.ibm.com">aliguori@us.ibm.com</a>> wrote:<br>
><br>
> Hi Ron,<br>
><br>
> I just got a lovely new Pixel and noticed the following problem with<br>
> SeaBIOS. Any chance you know how I can update the SeaBIOS firmware to<br>
> test this? Or perhaps the person to poke to get fixes included in the<br>
> shipped SeaBIOS?<br>
><br>
> Regards,<br>
><br>
> Anthony Liguori<br>
><br>
><br>
><br>
> ---------- Forwarded message ----------<br>
> From: "Anthony Liguori" <<a href="mailto:aliguori@us.ibm.com">aliguori@us.ibm.com</a>><br>
> To: "" <<a href="mailto:seabios@seabios.org">seabios@seabios.org</a>><br>
> Cc: "Kevin O'Connor" <<a href="mailto:kevin@koconnor.net">kevin@koconnor.net</a>> , "Anthony Liguori" <<a href="mailto:aliguori@us.ibm.com">aliguori@us.ibm.com</a>><br>
> Date: Wed, 24 Apr 2013 20:32:09 -0500<br>
> Subject: [PATCH] ps2: disable the keyboard and mouse before flushing the queue<br>
> If SeaBIOS is run as a payload via coreboot (and presumably as a<br>
> CSM), then it's possible the keyboard or mouse will still be<br>
> enabled. This can lead to data being queued even after the flush<br>
> function attempts to clear the queue.<br>
><br>
> Disabling the keyboard/mouse prior to flushing is pretty standard<br>
> in DOS programming so it's not surprising that it's needed here.<br>
><br>
> I believe this problem manifests with the Chromebook Pixel. People<br>
> have reported that sometimes the 'ESC to Select Boot Devices'<br>
> doesn't work. I can reproduce this faithfully by holding 'Ctrl-L'<br>
> in the firmware screen during SeaBIOS initialization.<br>
><br>
> I can't test this fix on an actual Pixel because I don't know how<br>
> to update SeaBIOS but I have tested the patch under QEMU.<br>
><br>
> Signed-off-by: Anthony Liguori <<a href="mailto:aliguori@us.ibm.com">aliguori@us.ibm.com</a>><br>
> ---<br>
> src/ps2port.c | 6 ++++++<br>
> 1 file changed, 6 insertions(+)<br>
><br>
> diff --git a/src/ps2port.c b/src/ps2port.c<br>
> index 9b760fd..2169171 100644<br>
> --- a/src/ps2port.c<br>
> +++ b/src/ps2port.c<br>
> @@ -55,6 +55,12 @@ static int<br>
> i8042_flush(void)<br>
> {<br>
> dprintf(7, "i8042_flush\n");<br>
> +<br>
> + /* Disable the keyboard and mouse to prevent additional data from<br>
> + * being queued. */<br>
> + outb(0xad, PORT_PS2_STATUS);<br>
> + outb(0xa7, PORT_PS2_STATUS);<br>
> +<br>
> int i;<br>
> for (i=0; i<I8042_BUFFER_SIZE; i++) {<br>
> u8 status = inb(PORT_PS2_STATUS);<br>
<span class="HOEnZb"><font color="#888888">> --<br>
> 1.8.0<br>
><br>
><br>
<br>
</font></span></blockquote></div><br><br clear="all"><div><br></div>-- <br><span style="font-family:arial,sans-serif;font-size:13px;border-collapse:collapse"><span style="font-family:arial,sans-serif;font-size:13px;border-collapse:collapse;color:rgb(153,153,153)"><span style="color:rgb(51,102,255)"><div>
Stefan Reinauer</div>G</span><span style="color:rgb(204,0,0)">o</span><span style="color:rgb(255,204,0);background-color:rgb(255,255,255)">o</span><span style="color:rgb(51,102,255)">g</span><span style="color:rgb(0,153,0)">l</span><span style="color:rgb(204,0,0)">e</span> Inc.</span><br>
</span>
</div></div>